The design has several benefits over ordinary traffic light controllers built with microcontrollers or Programmable logic controller such as simple structure, high reliability, low costs, ease in installation and maintenance. This system is also capable to change the timings of traffic signals according to the density of vehicles on the roads. The sensors are added as input to the controller for emergency conditions like ambulance etc. Coding of the design is done in Verilog HDL and the design is tested and simulated on Spartan-3 xc3s400 FPGA development kit. The effects of state encoding schemes like sequential encoding, gray encoding and One-Hot encoding are compared on the basis of size of synthesized circuit. In this paper an efficient traffic control system is designed using Mealy finite state machines.
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